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• Part 1：FET Amplifier and Load Pull DesignGuide
  The first part covers using a basic Load Pull DesignGuide setup for a FET from the built-in ADS DemoKit. Also included are the use of variables, a stability network, the Smith Chart contours, and more. The skills you will learn in this part can be applied to other simulations.
  A Lab is included in this part. This Lab topics are Load Pull design guide and stability for a FET amplifier design, including:
  New Workspace with Load Pull Design Guide
  Set up the DemoKit FET for Load Pull
  Specify the Basic Variables and Simulate
  Stability Network and Rectangular Load Sweep
  Circular Sweep for Load Pull
  Other Load Pull Results
  Load Pull Summary
  Part 2：Matching Designing and Optimization
  This second part covers Optimization and Goals, including an overview of the ADS optimizer. It also covers how to use the Impedance Matching tool and more.
  A Lab is included in this part. This Lab topics are Small-signal S-parameter optimization and designing matching networks for amplifiers and other designs. Optional is the Impedance Matching too. More details are:
  Amplifier Design with Template
  Simulate and examine Gain and Stability
  Set up an Optimization controller and Goals
  Enabling Variables or Parameters to be Optimized
  Running an Optimization
  Simulate with a Matching Network
  OPTIONAL: Impedance Matching tool
  Part 3：Harmonic Balance Techniques
  This third part covers Harmonic Balance simulations, including swept variables, IP3 and 2-tone analysis.
  There also is a Lab in this part, demonstrating Harmonic Balance simulations including swept variables, 2-tone simulations, equations for HB data, compression, and IP3. More details about the Lab are:
  FET amplifier design
  Basic HB 1-tone Simulation
  Functions and Equations for Input Power and Zin
  Gain Compression using XDB
  Sweep Input Power and Bias Voltage
  Output Power, Gain, and Power Sweep with a Slider
  Two-tone HB Simulation with variables
  Spectrum and Mix table
  OPTIONAL: IP3 Simulation (Third Order Intercept Point)
  Part 4：Circuit Envelope Simulations with Modulated Sources
  The last part covers Circuit Envelope simulation, which uses modulated sources such as CDMA and GSM. The envelope data is also covered.
  A Lab is included in this part, which demonstrating Circuit Envelope simulation using system components and a FET amplifier with GSM and CDMA modulated sources. More details about the Lab are:
  Create a new Workspace
  System Amp and PtRF source design
  Envelope simulation controller setup
  Simulate and plot the time domain response.
  Simulate with Amp distortion
  Amp with Demodulators for GSM
  GSM Envelope Simulation with VAR setup
  Copy FET AMP into the current workspace
  CDMA setup for FET Amp
  Example Data Display: ModSources_wrk
  CDMA simulation and data equation
  OPTIONAL – Distortion Effects using the Tune